Deep dive into the MIPS RISC processor arch: un-obfuscated RTL and more
Now engineering students in colleges learning VLSI design can go deeper in learning CPU architecture, thanks to Imagination Technologies for making available un-obfuscated RTL code for its MIPS CPU To the academic users.
Processor companies such as Intel and ARM offer different levels of access to the architecture. However there is no fully open free access to every user for most of the latest popular 32-bit processor architectures.
The move by Imagination Technologies in offering more open access to its MIPS architecture and also the RTL code helps VLSI design engineers in the semiconductor domain to experiment and learn a lot more than what they used to do.
The University Programme (IUP) called MIPSfpga by Imagination offers free and open access to a fully-validated, current generation MIPS CPU in a complete teaching package.
Imagination said in its release "Until now, what’s been missing from all of these courses is access to real, un-obfuscated RTL code that will enable professors and students to study and explore a real CPU. Imagination is changing that with MIPSfpga, bringing a new CPU architecture education paradigm to universities around the world."
imagination is offering a complete free-to-download package for universities, Getting Started Guide, teaching guide for professors, and examples designed to enable students to see how the CPU works and explore its capabilities. With the materials, students can develop a CPU and take it through debug, running on an FPGA platform.
The MIPSfpga deliverables were developed by Dr. David Harris who has configured the MIPS CPU at the heart of MIPSfpga, and Dr. Sarah Harris developed the teaching materials.
Imagination has suggested and provided the material for running the CPU code on Digilent Nexys4 platform with a Xilinx Artix-7 FPGA, and the Terasic DE2 platform with an Altera Cyclone FPGA.
"MIPS is an ideal architecture for teaching and studying CPU design. Professors and students alike can benefit from the ability to study MIPS RTL code and explore a real MIPS CPU." said Dr. John L. Hennessy, Office of the President, Stanford University (Co-Founder, MIPS Computer Systems, 1984).
"The availability of a MIPS CPU would be a fantastic practical complement to the theory we teach, and give students first-hand experience directly relevant to their future designs." said Professor K. Subbarangaiah, Director, VEDA IIT (VLSI Engineering and Design Automation.