ADC, processor IP, DSP software from synopsis for developing sensor interface
Synopsys as offering a full package of IP for developing sensor interface for range of applications which includes Internet of Things (IoT), automotive and industrial systems. The IP includes front-end analog such as ADCs and also 32 bit ARC processor IP core. The ARC EM4 32-bit processor core has custom extensions and instructions that support application-specific hardware accelerators and peripherals. The IP subsystem includes multiple configurable GPIO, SPI and I2C interfaces for off-chip connections and ARM AMBA AHB and APB protocol system interfaces to connect to the other functional blocks inside SoC.
Synopsys is also offering library of DSP functions and software drivers which include mathematical, filtering, Matic/vector and decimation/interpolation functions.
Synopsys claims that all the subsystem IP can be implemented within 0.01mm2 in a 28 nm process node. When it comes to power consumption, a 28 nm node device consumes less than 4uW/MHZ.
This pre-verified ready-to-integrate solution meets the requirements of a broad range of applications such as smart sensors, sensor fusion and sensor hub.
Synopsys is making this IP system available in October 2013 to early adopters, the general availability is planned in fourth-quarter of 2013.