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Date: 08-08-22

Standards CDC specs for SoC VLSI design

EDA IP standards organization Accellera Systems Initiative has formed a Proposed Working Group (PWG) to  define a standard Clock Domain Crossing (CDC) collateral specification to simplify SOC VLSI design integration.

It has also announced the first Proposed Working Group meeting to be held on Tuesday, September 13th from 9am – 4pm PT at Intel SC12, 3600 Juliette Lane, Santa Clara, SC12-538. VLSI engineers can register for this meeting. Non Accellera member companies can also attend this meeting. Leading VLSI chip design companies such as Arm, Cadence, Intel, Qualcomm, NVIDIA, NXP, STMicroelectronics and Siemens are involved in this program.

“At Accellera, we create and deliver standards that enhance the design and verification productivity of electronic products,” stated Lu Dai, Chair of Accellera. “Our members elevate the need for standards that will be beneficial to their projects. Currently, collateral generated from different CDC verification tools are not interoperable with each other. Our new Clock Domain Crossing Standardization PWG aims to address this issue. We look forward to input from the community and encourage all interested companies to join the PWG and provide guidance on the need for a standard in this area.”

“Typically, the CDC verification tools that the IP and SoC teams use rely on different formats to capture CDC intent,” stated Martin Barnasconi, Accellera Technical Committee Chair. “Based on the level of interest and commitment from the community, the PWG will determine if a standard is needed to enable the interoperability of CDC collateral generated by different CDC verification tools to ease integration. If your company is interested in providing input, please join us for the initial kick-off meeting in September.”

Background on Clock Domain Crossing Standardization Proposed Working Group as explained by Accellera:
SoC teams cannot reuse IP-level CDC collateral in the SoC environment if both teams use different CDC verification tools. This scenario is causing a CDC verification problem when the SoC teams source IP from IP providers that use a different tool for their own CDC verification. To perform holistic SoC-level verification, additional resources are needed to reconverge the IP with the verification tool used by the SoC team. Redoing IP-level CDC verification is time consuming and labor intensive. Standardization on CDC collateral will bring significant benefit to not only product companies, but also IP design houses, EDA tool companies, and the entire ecosystem. The PWG will collect requirements, identify technical feasibility, identify industry interest and acceptance, and provide a recommendation to start or not start a working group.

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