IP for post-silicon system validation in SoC design

Sonics has introduced Sonics Performance Monitor and Hardware Trace (SonicsMT) silicon IP for post-silicon system validation and software development processes for complex systems-on-chip (SoC).

“Today’s SoCs contain multiple programmable processors and cores that generate a huge volume of transactions,” said Ray Brinks, senior vice president of operations at Sonics. “On-chip performance analysis and troubleshooting techniques are now a must-have requirement for our customers and prospects using NoCs and shared memory in their designs. Complexity of communication between the cores makes real-time, at-speed debugging a necessity in order to find and fix problems with their operation and software interaction. SonicsMT provides SoC designers and software engineers the capability to visualize internal performance behaviors and tune system and software performance with pinpoint accuracy in a non-intrusive manner.”

Sonics says its SonicsMT is automatically embedded inside the on-chip interconnect and leverages existing NoC infrastructure to minimize gate count while achieving real-time, at speed (within one clock cycle of the event) monitoring and tracing of the critical performance metrics. It facilitates analysis and debug strategies for:
Chip Architecture Exploration – performance and mode interactions, power usage, memory utilization, traffic congestion for the current design as well as next-generation products;
Software Development – driver and application debug, memory optimization, algorithm development, power optimization, hardware acceleration interactions;
Chip Services – performance guarantees, class of service monitoring.

SonicsMT visualizes metrics such as burst density, read-write turnaround, and other key characteristics of SoC traffic.

SonicsMT is compliant with the ARM CoreSight SoC architecture and support for all CoreSight technology features including cross-triggering, authentication, global time stamps, and topology detection. Users program SonicsMT via the CoreSight SoC Debug Access Point (DAP). SonicsMT also enables debug support from third-party, CoreSight component compliant tools.

“ARM CoreSight technology has become a product of choice in our industry because it offers the most comprehensive debug and trace solution for ARM-based systems on the market,” said Andy Nightingale, director of system IP, systems & software group, ARM. “Sonics’ decision to align its SonicsMT technology with our architecture is extremely positive as it promises even greater value for our shared partners. It should increase partners’ system validation productivity, reduce their development risks and improve the overall quality of their SoC products and platforms.”

Availability: Sonics has proven SonicsMT and developed system profiling guidelines using a Xilinx Zync ZC702 evaluation board and the ARM DS-5 Development Studio 5 toolkit. SonicsMT is available immediately as an option to the SonicsGN on-chip network IP license.