RapidIO interoperable with Xilinx UltraScale FPGAs
IDT has made its RapidIO interoperable with Xilinx UltraScale FPGAs. This is aimed at designing 5G systems and advanced 4G systems. IDT has also developed wireless data compression solutions on Xilinx Zynq-7000 SoCs which allows more data to travel on the network fiber or link. This compression is targeted for remote RapidIO units, repeaters, and base stations in the front haul of networks to increase front haul capacity with compression ratios in the range of 2:1 to 3:1. IDT is offering advanced timing solutions on Xilinx devices, including IEEE 1588 high-performance time synchronization products to meet time alignment error requirements between 5G RRUs in Cloud Radio Access Networks (C-RAN). IDT and Xilinx are also solving problems in high-performance computing, hyperscale cloud data centers, mobile edge computing and mission-critical embedded systems.
“Our All Programmable technology has been in 3G and 4G network deployments globally, and we have led many of the 5G pre-product research initiatives, covering remote radio units, baseband processing, and C-RAN deployments,” said Farhad Shafai, vice president of communications business at Xilinx. “Now, working closely with IDT, we can provide even more value to our joint customers for the global rollout of 5G.”
“IDT’s strategy in 5G is focused on tackling the largest obstacles—capacity, latency and time synchronization—with silicon-level and software solutions that dramatically change the end-user experience,” said Sailesh Chittipeddi, IDT’s chief technology officer and vice president of global operations. “Our innovations have been in advance of network deployments, allowing for enhancement of user experience with key products for 4G Advanced, LTE-Pro and 5G developments.”
“With this announcement IDT and Xilinx bring innovation that is essential to the deployment of 5G networks,” said Jag Bolaria, principal analyst at the Linley Group, “Given the high cost of developing these technologies internally, system OEMs benefit from the solutions resulting from this industry collaboration, which builds upon multiple generations of R&D and proven deployments by the two companies.”
IDT and Xilinx recently completed interoperability testing between IDT’s RXS family of RapidIO switches with Xilinx FPGAs at 10.3125 Gbaud per lane. These FPGAs also support transceivers up to 32 Gbaud, providing a path to scale to higher bandwidth connectivity.