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  Date: 10/12/2012

Toshiba develops STT-MRAM chip outperforming SRAM in power consumption

Toshiba claims it has developed a prototype memory element for a spin transfer torque magnetoresistive random access memory (STT-MRAM) that achieves the world's lowest1 power consumption yet reported, indicating that it has the potential to surpass the power consumption efficiency of SRAM as cache memory.

Toshiba explains MRAM, a next-generation memory based on magnetic materials, has emerged as an alternative to SRAM because it is non-volatile, cutting leak current during standby status. However, until now MRAM power consumption has exceeded that of SRAM, throwing up a major barrier to practical application.

Toshiba says its new memory element advances the company's pioneering work in STT-MRAM and overcomes the longstanding operating trade-off by securing improved speed while reducing power consumption by 90 percent. The improved structure is based on perpendicular magnetization and takes element miniaturization to below 30nm. Introduction of this newly designed "normally-off" memory circuit with no passes for current to leak into cuts leak current to zero in both operation and standby without any specific power supply management, according to Toshiba.

 
          
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