Electronics Engineering Herald                 
Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New


  Date: 22/11/2012

20nm FPGA follows successful production of 28nm

Are you a high-end hardware board designer trying to squeeze maximum MIPS performance per square mm, and you are still not using FPGA in your designs which undergoes changes very frequently, then you are missing something important. Also, if your product volumes are not high, then you might be failing in achieving value for money in your designs without having FPGAs. Only exceptional is battery powered mobile device development where still FPGA is not must.

At 28nm, FPGA is becoming very essential for high-speed logic and communication system design. Now Both Xilinx and Altera are shipping 28nm FPGA for most of the application categories. Both Xilinx and Altera have announced 20nm FPGA launch. Xilinx claims it has lead over its competitors in many aspects of FPGA performance at same node.

Neeraj Varma, Country Manager, Xilinx India shared below points on the success of 28nm 7-series and launch of 20nm family which are called as 8-series:


Neeraj says "28nm gave us a very solid foundation, both at 28nm and 20nm SoC and 3D ICs are key differentiators. Xilinx is the Only FPGA vendor who has optimized performance per watt and we shipping ARTIX, KINTEX, VIRTEX, in volumes". "In defense series we are generation ahead in terms of memory performance, transceiver performance, DSP performance and the capacity and almost half 50% low power compared to our competition. If you look at the all programmable SoC, we shipped our SoC late last year, our competition literally has nothing. they are atleast in our estimation a year behind us in similar product.", adds Neeraj.

Zync has been exceptionally successful product. Xilinx never had such success in any of its family before, as per Neeraj.

On 2.5D/3D ICs which are launched late last year the product has ramped significantly. It is not only used in VLSI design prototyping but also in telecom applications where some volume shipping happens. Neeraj says Xilinx competitor (mainly Altera) is still making test-chips.

Another differentiator Xilinx offering is powerful FPGA programming software suite called Vivado. Customers adopted Vivado in big way. According to Neeraj, the design time was brought down from 2/3 months to 2/3 weeks using Vivado. Vivado is a complete EDA tool for FPGA supporting 3rd party IP integration, IP reuse and remote team support.

Xilinx 3D IC offerings include both homogenous and heterogeneous ICs.

The benefits of 20nm FPGAs which include traditional FPGAs, Hard IP integrated SoC and 2.5D interposer technology based FPGA ICs are:

30-50% improvement in price/performance
Doubling the capability of Analog and mixed signal
SoC will feature heterogeneous multi cores
20nm 3D ICs to feature FPGA, transceiver and memory blocks stacked in one package.
Power consumption cut nearly by half compared to 28nm.
For communication equipment design, 20nm FPGA will increase port/board and decrease cost/port.
Hard IP integrated FPGA chips can offer better image and video processing in 20nm node.
3D FPGA at 20nm useful for next generation smart networks operating from 100G to 400G.
3D Die to die interconnect is increased by 5x in 20nm chips and the interface going to be industry standard so that any die can be connected.
Transceivers at 20nm to handle 56 Gbits/sec.
A 3D 20nm FPGA offers 30 to 40 ASIC million gates.
To top all these benefits Vivado design software wires 30 million+ gates faster and better.

Well, is all this great technology generating sales revenue! Xilinx is winning 70% designs and high growth in revenues are estimated in 2013 for 28nm, as per Neeraj.

As 20nm technology becomes mainstream and 3D IC integration matures, programmable silicon might become inevitable nearly in all applications except some portable electronic devices which runs on battery for days without charging.

Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
©2012 Electronics Engineering Herald