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  Date:16th Nov 2011

Altera to support OpenCL for FPGAs

To support the speedy development of parallel computing systems using FPGAs along with standard processor chips, Altera has announced a development program focused on the Open Computing Language (OpenCL) standard for FPGAs and SoC FPGAs. Altera says its OpenCL program combines the parallel performance capability of FPGAs with the OpenCL standard to enable powerful system acceleration. OpenCL standard is an open, royalty-free standard developed by Khronos Group. OpenCL supports cross-platform parallel programming of heterogeneous systems.

Since OpenCL is C langauge based the programming code-writing time and effort is expected to be far less compared to traditional FPGA development using lower level hardware description languages (HDLs) such as Verilog or VHDL.

Altera explains the OpenCL standard offers a natural separation between "host" code-pure software, written in standard C/C++, that can be executed on any type of microprocessor-and the "kernel" code, written in OpenCL C, that runs on the accelerator. By profiling their algorithms, system architects can choose which functions to accelerate as kernels in the FPGA device to improve system performance.

For more information on the OpenCL standard, visit www.khronos.org/opencl.


 
          
Xilinx 7 series FPGA
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