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  Date:10th Oct 2011

MoSys demos interoperability of its Bandwidth Engine IC with SerDes from Avago

MoSys has demonstrated interoperability of its Bandwidth Engine IC with the SerDes characterization and evaluation board from Avago Technologies.

MoSys says its Bandwidth Engine SerDes is compatible with the OIF CEI-11 specification allowing it to interface with network processing ASICs from Avago Technologies and the GigaChip Interface used by the Bandwidth Engine IC is a 90% efficient, no-cost, open transport protocol optimized for chip to chip communications. The demo has shown the Bandwidth Engine IC communicating with the Avago SerDes at a full 10.3125 Gbps.

"Avago Technologies is well-known as one of the world's leading providers of high-performance ASICs to networking customers and they are renowned for having one of the industry's best SerDes technologies. Having interoperability between our Bandwidth Engine and network processing ASICs designed by Avago is important for our mutual customers," stated David DeMaria, Vice President of Business Operations. "Our demonstration of interoperability with Avago is an important milestone."

"As a leading provider to tier one networking companies, Avago Technologies is always looking for innovative solutions that complement our products," stated Todd Metcalf, Senior Director of Marketing for Avago Technologies. "We view MoSys Bandwidth Engine as a powerful new technology and are pleased to be the first ASIC company proving interoperability."


 
          
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