Date:2nd Nov 2011
Semtech uses MATLAB and Simulink to develop
MathWorks has announced Semtech Corporation has used MATLAB
and Simulink products to reduce development time of optimized
digital receivers in wireless RF devices. Mathworks claims
Semtech has adopted Model-Based Design tools to create FPGA
prototypes 50% faster than before, reduce verification time
from weeks to days and shorten development time by 33%.
Simulink and Simulink HDL Coder saves designer from hand
"We were tasked with the challenges of accelerating
the development time for a digital receiver and finding
a way to improve our development workflow. MathWorks tools
enabled us to explore more alternatives and new features,
and ultimately deliver a more optimized, better performing
design," said Frantz Prianon, IC design engineer at
Semtech. "With Simulink and Simulink HDL Coder, once
we have simulated the model we can generate VHDL directly,
prototype on an FPGA, and fully verify the VHDL implementation.
It saves a lot of time, and the generated code contains
some optimizations we hadn't thought of."
"Semtech represents the leading edge of semiconductor
companies that are transitioning to new methodologies for
highly integrated mixed-signal devices. With Simulink and
Model-Based Design, Semtech was able to evaluate multiple
design ideas at the prototyping stage and eliminate bottlenecks
in their development workflows," said Ken Karnofsky,
senior strategist for signal processing applications, MathWorks.
"Further, automatic HDL code generation with Simulink
HDL Coder allowed Semtech to eliminate coding errors and
quickly create a working FPGA prototype."
More details visit: www.mathworks.com