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  Date: 02/01/2017

150 million+ TI made ADAS automotive chips assisting drivers on road

Over 150 million Texas Instruments made advanced driver assistance systems (ADAS) SoCs are on road, this was disclosed by Texas instruments in its latest release.
TI said its chips are of heterogeneous architecture allowing for increased concurrencies allowing designers to further extend image, signal and vision processing capabilities. TI's automotive processors use general purpose processors and facilitate multi-OS and multi-domain software architecture.

TI's ADAS specific ICs TDAx driver assistance SoCs are scalable and open solutions based on a common hardware and software architecture for ADAS applications, including camera-based front (mono/stereo), rear, surround view and night vision systems, and multi-range radar and sensor fusion systems. TI's TDAx SoCs have purpose-built hardware accelerators (HWA) such as image signal processors (ISPs), embedded vision engines (EVEs) and digital signal processors (DSPs), to handle image data.

Below are the further details provided by the Texas estimates of its ADAS product family:

The TDA3 designed for "entry to mid" performance for broad ADAS applications including front camera, surround view including 3-D without GPU, smart rear camera, radar, camera mirror replacement/eMirror, driver monitoring and Lidar.

TDA2 Eco intended for "mid" performance targeting 3-D surround view with GPU, for both Ethernet and LVDS networks.

The TDA2 targeted for "mid to premium" performance for broad ADAS & HAV applications including front camera, surround view with GPU and fusion/centralized processing.

The "Jacinto" family of processors are designed for automotive digital cockpit applications including infotainment, head unit co-processing for infotainment, informational ADAS, integrated digital cockpit, digital instrument cluster, head-up display and more. Designed for automotive safety and robustness, "Jacinto" heterogeneous architecture includes hardware firewalls, allows separation between High Level OS (HLOS) and safety OS as well as implementation of robust multi-domain software architecture capable to be ASIL-B safety certified. The processors bring unprecedented feature-rich, in-vehicle infotainment, instrument cluster and telematics features to the next generation of automobiles.

The scalability of the "Jacinto" family allows developers to target specific performance for their applications and leverage headroom using higher performance variants, if required, without software modifications or hardware changes. The "Jacinto 6" family of processors is built on the same architecture, offering software and hardware compatibility with the broadest array of highly scalable ARM Cortex-A15 cores for automotive applications. The members of the "Jacinto 6" family of infotainment processors include:

The DRA71x, "Jacinto 6 Entry" is an entry-level infotainment processor for display audio, radio/audio and other cost-sensitive in-vehicle automotive cockpit applications.

The DRA72x, "Jacinto 6 Eco" delivers feature-rich infotainment, digital cluster and telematics features for entry- to mid-level vehicles.
The DRA74x "Jacinto 6" is intended for mainstream in-vehicle infotainment applications and head-units.

Both DRA75x processors, "Jacinto 6 EP" and "Jacinto 6 Ex", have extended DSP and vision processing performance to enhance digital cockpit integration.

The "Jacinto" family of processors is powering infotainment systems such as Ford SYNC 3, Volkswagen MIB-II, SAIC-Alibaba "Internet Car" and BMW.

 
          
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