electronics engineering Herald                                          
Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
Processor / MCU / DSP
Memory
Analog
Logic and Interface
PLD / FPGA
Power-supply and Industrial ICs
Automotive ICs
Cellphone ICs
Consumer ICs
Computer ICs
Communication ICs (Data & Analog)
RF / Microwave
Subsystems / Boards
Reference Design
Software / Development kits
Test and Measurement
Discrete
Opto
Passives
Interconnect
Sensors
Batteries
Others

Date: 29th May 2011

Version 5 of PowerPro from Calypto does faster RTL power optimization

Calypto Design Systems, Inc. has announced version 5.0 of its PowerPro Platform for VLSI designers to help them speed up the complex low power semiconductor chip design. Calypto says this is a full suite of RTL power optimization tools proven to reduce power by up to 60 percent on multi-million gate designs. The PowerPro Platform features new RTL power analysis capabilities, production-proven optimization techniques for reducing dynamic and leakage power in the logic, memory, and embedded processor sections of an SoC, and is the only solution that provides sequential formal equivalence checking, claims Calypto.

The other key features, and benefits listed by Calypto includes:

1. Version 5.0 of the PowerPro Platform improves turnaround time by 2X
2. Includes new usability features such as advanced reset-logic insertion, bottom-up flow support, a     stronger sequential analysis engine for PowerPro MG (Memory Gating), and the ability to read the 3. 3. Fast Signal Database (FSDB), which eliminates the need for large Value Change Dump (VCD) files.
4. Each PowerPro module can run in a fully automatic or a manual mode, giving users the flexibility to     select the use mode most appropriate for each section of their design.
5. The manual use mode graphically illustrates the power reducing RTL modifications that can be     made, but leaves it up to the user to decide how best to implement them.

"Our PowerPro Platform is the clear industry leader in RTL Power Optimization," noted Anmol Mathur, CTO, Calypto Design Systems. "PowerPro delivers superior QoR, and consistently matches or exceeds what a designer can do manually. In addition to a manual use model, the usability and run time improvements in PowerPro 5.0 are allowing PowerPro to be used in a fully automatic flow by several customers. This reduces project cycle time and is ideal for applications where the team does not have a deep understanding of the block, such as in IP refuse."

In another release Real Intent Inc. and Calypto Design Systems have announced that the companies are partnering to offer customers a seamless and interoperable flow between Real Intent's Meridian CDC and Ascent Lint products for Register Transfer Level (RTL) sign-off and Calypto's PowerPro Platform for RTL power analysis and optimization. The integration combines the Electronic Design Automation (EDA) industry's leading tools for RTL power optimization and RTL sign-off into a flow that minimizes setup and delivers superior quality of results.

"In conversations with joint customers, we have heard that our users regard tools from Real Intent and Calypto to represent the best solutions in their class, presenting a great opportunity to combine our tools into a powerful flow," said Prakash Narain, president and CEO of Real Intent, Inc. "Our toolsets are highly complementary, and together form a solution that easily beats broader product offerings from larger vendors. We see this as an opportunity for users to upgrade their RTL power optimization and sign-off tools while enjoying the benefits of an integrated solution."

"Partnering with Real Intent enables Calypto to offer our customers a powerful solution that produces high-quality, power-optimized RTL designs coupled with comprehensive RTL sign-off," stated Doug Aitelli, CEO of Calypto. "This is only the first step in the partnership between the two companies, and we will continue to work with Real Intent and our customers to provide leading edge solutions for RTL design and sign-off."


To know more visit www.calypto.com


 
Xilinx 7 series FPGA
Home | News | New Products | India Specific | Design Guide | Sourcing database | Student Section | About us | Contact us | What's New
©2010 Electronics Engineering Herald