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Online course on Embedded Systems

 

MODULE -5: Architecture of ARM7TDMI processor core and ML67Q4051 Microcontroller


The background of ARM:

ARM is the acronym for Advanced RISC Machine, an UK based company, which has pioneered the growth of RISC processor Architecture.
What is RISC? RISC stands for Reduced Instruction Set Computer. RISC based architecture although invented quite earlier but has become popular and overtook its rival architecture Complex Instruction Set Computer (CISC) somewhere during late nineties. Most popular CISC architecture is 80x86 processors from Intel. Recently Intel too has adopted RISC kind of features and architecture in latest CPUs.

The advantage of RISC is in the simplicity (in terms of processor resource consumption) of the instructions and processing time. Each instruction takes only single clock cycle. Overall power consumption is very less. Due to this fast response, low power consumption and coding flexibility, RISC architecture is highly suitable for embedded systems. However there is one drawback with RISC, that is the instruction set code is longer and takes more memory. This issue is no more a concern with the growth in the memory technology.

As said earlier in the previous modules, we are using OKI Semi's ML67Q4051 microcontroller in this course material. The processor core used in ML67Q4051 is ARM7TDMI. ARM7TDMI is the most used RISC core from ARM. ARM7TDMI core is old and not suggested for new designs however it is good to start learning from basic 32 bit processor core like ARM7DMI.


The architecture of ARM7TDMI is shown in figure below

arm_processor

 

Highlights of ARM7TDMI:
    --There are 37 registers of 32 bit wide in this processor core. 16 registers are available for the  programmer.
    --It's pipeline architecture; that is 3 instructions are processed simultaneously at 3 different stages.
    --The bus architecture is of Von Neumann type where single 32-bit data bus carry both instructions  and data.
    --The data-types can be of 8 bit /16 bit/32 bit wide.
    --Processor can run on seven different modes based on the application requirement.
    --Has built in 32x8 multiplier and a 32 bit barrel shifter (both needed much for DSP functionality)
    --This processor can also execute another instruction set called THUMB state (16 bit) to give the        programmer an option to use this processor like CISC processor. The total instruction set can be tidier and takes less memory space.

To study in-depth, the architecture and other capabilities of ARM7DMI, please read the pdf file from the link below. The content of this pdf file is simple and self-understanding.

http://www.arm.com/pdfs/DDI0210B_7TDMI_R4.pdf

OKI'S Microcntroller ML67Q4051:

Now let us read about the OKI Semiconductor's MCU ML67Q4051. It has quite a good list of latest features.

The features of this MCU are,
   --Has built in SRAM of 16 KB and FlashROM of 128 KB.
   --Has robust clock network
   --Interrupt controller supports 41 interrupt resources
   --External memory controller to access ROM, SRAM, and I/O connected to the external memory  space.
  --Has system timer of 16bit auto reload timer with its interrupt given high priority.
  --Built-in DMA controller enables direct data transfer between memory-memory, I/O -memory, and  between I/O -I/O devices to spare the CPU from simple data transfer burden.

   --Watchdog timer to monitor the program from running out of control and generate interrupt or reset  signal.
  --The built-in 4-channel, 10-bit resolution analog-to-digital converter supports two modes of  operation:  Scan mode sequentially converts input from the selected range of channels; select mode  converts input   from a single channel.
  --Has 15 general purpose I/O ports: 8channels of 8-bit, 3 channels of 7-bit, 3 channels of 6-bits, and  one channel of 5 bits.
  --Integrates one channel of I2C bus interface, one I2S (serial audio interface) bus interface, one UART  interface, one SIO interface and one SPI interface.
  --Real time clock (RTC) with 10,000-year calendar with resolution down to 1 second.
  --Flexible timer block with 6 channels of 16 bit timer.
  --Has JTAG interface to debug the program from a host computer


The internal architecture of this MCU is shown below.

microcontroller_architecture

To learn in-depth about this MCU please visit following link:
http://www.okisemi.com/eu/docbox/ML67Q4050_4060-DS_rev1.2.pdf

 

Next Module - 6(Sample programs in C)

     Previous Module - 4(Sample programs in C)


ABOUT THIS COURSE:

Totally EEHerald plan to bring 12 modules. You can be assured of completing basic course in Embedded Systems after studying and practicing exercises in all the modules. We will give priority to programming and serial communications (SPI, USB, CAN etc..) part. To receive a copy of total course syllabus, please email to us.

This free tutorials on embedded systems is prepared by embedded professionals with more than10 years of industrial experience, however we want your feedback on this course content; please email your questions, suggestions and comments to editor@eeherald.com. Your questions on present modules will be answered in the revised modules. We may change the course content based on the majority of your requests and feedbacks.
Please let your friends know about this course, we request you to email this link to your friends and colleagues who are interested in embedded system.

 

 

 

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