By Aries Huang, Fairchild Semiconductor
Abstract: Power-electronics engineers designing
switched mode power supplies (SMPS) are faced with the challenges
of limited space, the need to meet worldwide energy regulations,
and ease of design. Dual switch QR flyback topology and
secondary synchronous rectification is the ideal solution
to meet future energey regulation - providing good overall
efficiency, managing low power loss at light load, while
providing ease of design. The validity of the proposed topology
is verified with a 90W prototype power supply.
Introduction: Because of the increasing concern
for the environmental issues, the design of power supplies
for high efficiency and low standby power consumption keeps
gaining attention in these years. Soft-switching or resonant
conversion topologies are utilized in recent years to meet
high efficiency challenge. However, future challenge for
low power consumption, low cost, easy design and manufacturing
poses a huge challenge to current resonant topologies. The
purpose of this article is to illustrate the operation theory
and benefit of a new proposed topology: two-switch quasi-resonant
(QR) flyback converter and demonstrate a 90W power design
which fulfills the requirement of high-efficiency (>
90%) and slim form factor ( 60mm x 95 mm x 16.5mm) while
meeting 2013 ErP power saving request ( <0.5W under 0.25W
Given the benefit provided by dual switch flyback, it could
be a potential solution to meet the future demand of notebook
AC/DC adaptors, LED TV power supply, LED lighting drivers,
all in one PC powers and high power charger and any such
SMPS power supply designs.
A. Advantages and features of Dual-Switch
1. High Efficiency:
I. D2D stage: Recycling leakage
inductance energy and near ZVS operation
II. PFC Stage: Two level PFC output
to improve low line efficiency
2. Light load and no load efficiency:
I. Power Saving : Meet 2013
ErP power saving request: < 0.5W @ 0.25W load.
II. Excellent light load
efficiency by deep extended valley switching.
3. Power switching voltage be
clamped to VIN and could use < 500V MOSFET.
4. No snubber circuit and loss,
less heat problem.
5. Good for slim form factor
design by allowing slim transformer and high frequency design.
6. Easy to design and manufacture.
B. SYSTEM BLOCK OVERVIEW
Figure 1: Simplified System Block
Figure 1above illustrates the simplified system block diagram
of a dual switch flyback. It contains three key stages:
PFC stage, PWM Stage and Synchronous Rectifier (SR) Stage.
Three Fairchild ICs used to implement this power supply
design solution are:
1. FAN6920: Critical Mode
(CRM) PFC and Quasi-Resonant PWM Combo IC
2. FAN7382: High Side Driver
3. FAN6204: Synchronous Rectifier
The operation theory and solution benefit are explained
in below paragraphs. In PFC stage, it uses a CRM PFC to
boost output into PWM stage. In a power ranges less than
200 watt, a CRM PFC is preferred due to its merit of zero
current switching and zero diode reverse recovery loss.
Also, the FAN6920 has a feature of two PFC output levels
which allow a lower PFC output during low AC input to improve
low line efficiency.
In PWM stage, there are two power switches to control
energy delivery timing, their turn-on/off timing are in
same sequence, the control signals are sent from PFC/PWM
combo controller  . Combining with two recycling diodes
that can clamp the maximum voltage rating of PWM switches,
It also recycles the leakage inductance energy to gain more
system efficiency. By doing so, primary snubber can be removed
to simplify circuit and save system cost. Furthermore, this
stage operates in quasi-resonant mode; it also could keep
PWM switches turning-on with minimum level of drain-source
voltage, which could save lots of switching losses in PWM
stage. Moreover, this topology could allow wide input voltage
(PFC output voltage) range, therefore, by adjusting PFC
output voltage that could benefit PFC stage efficiency improving.
In rectification stage, there is one rectifier diode is
used to conduct and rectify output current, and then generate
a DC output voltage to load. However, forward-voltage drop
of rectifier diode is generated while the rectifier diode
is forced to turn on, because this voltage drop generates
rectification loss and causes overall efficiency suffered
severely. To further reduce and improve this loss and caused
thermal issue, using a low turn-on-resistance (RDS-ON) MOSFET
to be an active device - Synchronous Rectifier (SR) for
rectifying is preferred to be chosen. The SR MOSFET could
be driven and controlled through a SR controller (e.g. FAN6204
DUAL SWITCH FLYBACK - BASICS OPERATION AND DESIGN CONSIDERATION
A. PFC STAGE
As mentioned previously, PFC stage operates in critical
conduction mode, so that switching frequency would be changed
from output load. With heavy load condition, the frequency
becomes lower whereas becoming higher with light load condition.
And therefore, switching loss of PFC switch becomes a key
factor for overall system, especially in light load condition.
Referring to Figure 2, when PFC switch turns off, the drain
voltage of PFC switch raises and which is clamped to PFC
output voltage until boost inductor current dries out.
Figure 2: Key waveforms on PFC power switch
The behavior waveform when inductor current discharges
to zero can also be seen in Figure 2, when drain voltage
of PFC switch starts to resonate and decrease, and then
when it reaches minimum level, PFC switch could be turned
on by PFC controller then starts a new switching cycle again.
If PFC output voltage is set to lower and input voltage
is also at low level. If it can satisfy the following equation
(1), the PFC switch could be turned on with much lower drain
voltage or achieving ZVS. That could much better for PFC
stage efficiency improving.
(1)With different PFC output voltage setting, we can obtain
PFC stage efficiency result as shown in Figure 3. By setting
lower output voltage, PFC stage can improve more switching
efficiency during light load due to higher switching frequency.
Also we can obviously see the results on 20W output power
in Figure 3; there is around more than 4% efficiency improvement
by decreasing PFC output voltage.
Figure 3, PFC stage efficiency comparison at various
PFC output voltages at 115VAC.
B. PWM STAGE
In PWM stage, dual-switch Flyback converter is proposed
in this article to act as main DC/DC converter to generate
and regulate DC output voltage in adaptor. Figure 4A and
4B show this converter simplified circuit and its detail
key waveforms. By using a Quasi-Resonant controller (e.g.
FAN6920 ), PWM switches could turn on with minimum voltage
level because the switches drain-source voltages resonate
and decrease when PWM transformer current discharges to
zero and then drain-source capacitances of PWM switches
resonate with transformer inductor. The controller detects
the voltage reach valley, and then turns on PWM switches.
During PWM switches turn off, the drain-source voltages
are reflected from secondary winding plus input voltage,
and these voltage can be expressed as following:
Figure 4A (above): Dual-switch Flyback
Figure 4B (above): Key waveforms of Dual-switch Flyback
Referring to Figure 4C, at the beginning of turn-off period,
leakage inductance of transformer produces voltage spike
on PWM switches, and causes drain voltages increase to VIN
voltage and then clamped to this level. And therefore, the
leakage inductance energy which was stored during PWM switches
turning on could be released by two paths. One is releasing
to PWM drain-source capacitances to charge and increase
drain voltage to VIN from the voltage (Refer to equation
2). And releasing and recycling to VIN through two recycling
diodes D1 and D2. So that the transformer turn-ratio and
VIN voltage level (PFC output voltage) would influence recycling
period and percentage.
Figure 4C (above): Enlarged waveform when PWM switches
TURN RATIO CONSIDERATION OF PWM TRANSFORMER
To compare different turn-ratio and look how it would
have influenced PWM stage. The following measured waveforms
Figure 5 (A) and (B) show drain-source voltage of low-side
PWM switch during different turn-ratio (N=11 and 12).
There are several different system behaviors between Figure
5 (A) and (B). Setting higher turn-ratio it would obtain
more depth valley switching, and it also could benefit on
decreasing switching losses of PWM switches. Another point
is recycling period would become longer with higher turn-ratio
setting. It can be obviously seen its differences in measured
waveforms. Higher turn-ratio setting, it could also recycle
more leakage inductance energy rather than wasting energy
on charging drain-source capacitances of PWM switches. Figure
5 (C) shows recycled currents which flow through diodes
D1 and D2 during different turn-ration setting.
Figure 5A (above)
Figure 5B (above)
Figure 5C (above)
Another point of view, on secondary RMS current
will become higher after increasing turn-ratio. Based on
various applications, It should to be considered and be
optimized between PWM switching loss and rectification loss
There is one limitation on using this PWM topology due
to recycling diodes. During PWM switches turn off period,
the voltage on primary winding is clamped to VIN. If the
voltage of secondary winding is low than output voltage
target (VIN/N < VO), the output voltage will drop and
be clamped to VIN/N, and the most energy stored in transformer
would be release to VIN during turn-off period. That could
cause output voltage out of control until VIN voltage is
charged to higher than N×VO. So that VLP voltage should
be designed smaller than the VIN voltage (Not including
voltage spike) during PWM switches turning-off period.
PWM STAGE GREEN MODE OPERAION
ENERGY STAR EPS (External Power Supply) version 2.0
has been announced and gone into effect on Nov 2008; Table
1 shows its detail criterion for different rated wattage.
In order to meet this requirement, green mode operation
has been developed and used in many years ago. Especially
in Flyback converter, it was a popular topology and has
been widely chosen and designed for consumer power supply
and less than 100W power supplies. For Flyback converter,
green mode operation could effective reduce controller operating
current, system power consumption and improving the light
load efficiency. However, dual-switch Flyback converter
can also base on these green techniques to gain all benefits
Table 1, Energy Consumption Criteria for No-Load (EPS
|Nameplate Output Power (Pno)
Maximum Power in No-Load
||Ac-Ac (EPS v2.0)
||Ac-Dc (EPS v2.0)
|0 to < 50 watts
|| 0.3 watts
|50 to 250 watts
|| 0.5 watts
Figure 6 shows FAN6920's feedback voltage (VFB) versus
minimum PWM turn-off time (TOFF-MIN) characteristic curve.
During light load condition or output load decreasing, PWM
turn-off time would be extended according to VFB voltage.
That means the PWM switching frequency will be decreased.
Furthermore, controller will let PFC stage operation at
green mode to further reduce operating current and losses
from PFC power device circuit. Moreover, PWM stage has still
keep valley switching property to keep switching loss at
minimum level. And therefore power system can get better
efficiency during various output load (e.g. 25%, 50%, 75%
Figure 6, Feedback voltage (VFB) versus TOFF-MIN curve
To compare the Schottky diode (FYP2006DN)  with the
MOSFET (FDP5800) , under same conducted current level,
around 0.6V difference forward voltage drop can be calculated
and obtained (Refer to Figure 7 and 8). Worse yet, because
forward voltage drop is depending on its conducting current,
However, because rectifier diodes are passive component,
it's very easy to implement on power system whereas SR needs
to be triggered by additional timing driven circuit.
Figure 7, Characteristic curve for Schottky Diode (FYP2006DN,left)
and drain current versus drain-source On-Resistance RDS(ON).
EXPERIMENT : 90W/19V SLIM AC/DC ADAPTOR
A 90W/19V SLIM Adaptor (Refer to Figure 10) has been done
and verified its feasibility, and to show its performance.
As shown in Table 2, with green mode operation, it can meet
ENERGY STAR EPS version 2.0 no-load power consumption requirement,
and achieve under 200mW input power. Furthermore, Figure
11 and 12 are shows the efficiency comparison between 90W
dual-switch QR flyback and 90W single switch QR flyback,
the efficiency of dual-switch QR flyback is higher than
single switch flyback, with the average efficiency is more
than 90% (including output cable).
Figure 10, a 90W/19V Slim AC/DC Adaptor
Table 2, No-Load & ligh loadPower Consumption (90W/19V)
|AC Input Voltage
||Maximum Input Power in No-Load
Figure 11, Efficiency comparison between dual-switch
QR flyback and single switch QR flyback (90W/19V Slim Adaptor,
including output cable AWG18-1.2m).
Conclusion: Compared with single switch flyback,
the efficiency of dual-switch flyback is better than single-switch
flyback, low voltage stress at primary side switch, without
snubber circuit. Compared with LLC topology, dual-switch
flyback is easy to design and mass production, shorter design
timing and higher efficiency at light load condition. Dual-switch
switch QR flyback has low standby power consumption, can
help total system to pass EuP 2.0 spec (standby power consumption
<0.5W). So, the dual-switch QR flyback is an ideal solution
for high efficiency and low profile power supply design
such as AC/DC adaptor power supply used in notebooks.
APPENDIX and REFERENCE
 "FAN6920MR", Integrated Critical Mode PFC
/ Quasi-Resonant Current Mode PWM controller, Data Sheet,
 "AN-6921", Integrated Critical Mode PFC /
Quasi-Resonant Current Mode PWM controller, Application
Note, Fairchild semiconductor.
 "FAN6204", Synchronous rectification controller
for Flyback and Forward Freewheeling Rectification, Data
Sheet, Fairchild semiconductor.
 "FDP5800", N-Channel Logic Level PowerTrench®
MOSFET, Data Sheet, Fairchild Semiconductor
 "FYP2006DN", Schottky Barrier Rectifier,
Data Sheet, Fairchild Semiconductor.